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Am29BL802C Known Good Die
Data Sheet
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SUPPLEMENT
Am29BL802C Known Good Die
8 Megabit (512 K x 16-Bit) CMOS 3.0 Volt-only, Burst-mode, Boot Sector Flash Memory--Die Revision 1 DISTINCTIVE CHARACTERISTICS
s 32 words sequential with wrap around (linear 32), bottom boot s One 8 Kword, two 4 Kword, one 48 Kword, three 64 Kword, and two 128 Kword sectors s Single power supply operation -- Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors s Read access times 22 ns burst access at extended temperature range 80 ns initial/random access s Alterable burst length via BAA# pin s Power dissipation (typical) -- Burst Mode Read: 15 mA @ 25 MHz, 20 mA @ 33 MHz, 25 mA @ 40 MHz -- Program/Erase: 20 mA -- Standby mode, CMOS: 22 A s 5 V-tolerant data, address, and control signals s Sector Protection -- Implemented using in-system or via programming equipment -- Temporary Sector Unprotect feature allows code changes in previously locked sectors s Unlock Bypass Program Command -- Reduces overall programming time when issuing multiple program command sequences s Embedded Algorithms -- Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors -- Embedded Program algorithm automatically writes and verifies data at specified addresses s Minimum 100,000 erase cycle guarantee per sector s 20-year data retention at 125C s Compatibility with JEDEC standards -- Pinout and software compatible with singlepower supply Flash -- Superior inadvertent write protection -- Backward-compatible with AMD Am29LV and Am29F flash memories: powers up in asynchronous mode for system boot, but can immediately be placed into burst mode s Data# Polling and toggle bits -- Provides a software method of detecting program or erase operation completion s Ready/Busy# pin (RY/BY#) -- Provides a hardware method of detecting program or erase cycle completion s Erase Suspend/Erase Resume -- Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation s Hardware reset pin (RESET#) -- Hardware method to reset the device for reading array data s Tested to datasheet specifications at temperature s Quality and reliability levels equivalent to standard packaged components
Publication# 23694 Rev: A Amendment/+2 Issue Date: September 13, 2002
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GENERAL DESCRIPTION
The Am29BL802C in Known Good Die (KGD) form is an 8 Mbit, 3.0 volt-only Flash memory. AMD defines KGD as standard product in die form, tested for functionality and speed. AMD KGD products have the same reliability and quality as AMD products in packaged form. programs the array (if it is not already programmed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin. The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory. This can be achieved in-system or via programming equipment. The Erase Suspend/Erase Resume feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory. The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both these modes. AMD's Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection.
Am29BL802C Features
The Am29BL802C is an 8 Mbit, 3.0 Volt-only burst mode Flash memory devices organized as 524, 288 words. These devices are designed to be programmed in-system with the standard system 3.0-volt V CC supply. A 12.0-volt VPP or 5.0 VCC is not required for program or erase operations. The device can also be programmed in standard EPROM programmers. The device offers an access time of 80 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls.
Burst Mode Features
The Am29BL802C offers a Linear Burst mode--a 32 word sequential burst with wrap around--in a bottom boot configuration only. This devices require additional control pins for burst operations: Load Burst Address (LBA#), Burst Address Advance (BAA#), and Clock (CLK). This implementation allows easy interface with minimal glue logic to a wide range of microprocessors/microcontrollers for high performance read operations.
AMD Flash Memory Features
Each device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. The I/O and control signals are 5V tolerant. The Am29BL802C is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices. Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithm--an internal algorithm that automatically pre-
Electrical Specifications
Refer to the Am29BL802C data sheet, publication number 22371, for full electrical specifications on the Am29BL802C in KGD form.
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PRODUCT SELECTOR GUIDE
Family Part Number Speed (ns) Regulated Voltage Range: VCC =3.0-3.6 V Am29BL802C 80R 80 80 22 (at 30 pF loading)
Max access time, ns (tACC, tIACC) Max CE# access time, ns (tCE) Max OE# access time, ns (tOE)
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AC CHARACTERISTICS Burst Mode Read
Parameter JEDEC Std. tIACC Description Initial Access Time LBA# Valid Clock to Output Delay (See Note) Burst Access Time BAA# Valid Clock to Output Delay LBA# Setup Time LBA# Hold Time BAA# Setup Time BAA# Hold Time Data Hold Time from Next Clock Cycle Address Setup Time to CLK (See Note) Address Hold Time from CLK (See Note) Output Enable to Output Valid Output Enable to Output High Z Chip Enable to Output High Z CE# Setup Time to Clock Max 80 ns Speed Options and Temperature Ranges 80R Unit
tBACC tLBAS tLBAH tBAAS tBAAH tBDH tACS tACH tOE tOEZ tCEZ tCES
Max Min Min Min Min Max Min Min Max Max Min Min
24 6 2 6 2 4 6 2 24 25 25 6
ns ns ns ns ns ns ns ns ns ns ns ns
Note: Initial valid data will be output after second clock rising edge of LBA# assertion.
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AC CHARACTERISTICS Erase/Program Operations
Parameter JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX Std tWC tAS tAH tDS tDH tOES tGHWL tELWL tWHEH tWLWH tWHWL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVCS tRB tBUSY Notes: 1. Not 100% tested. Description Write Cycle Time (Note 1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recovery Time Before Write (OE# High to WE# Low) CE# Setup Time CE# Hold Time Write Pulse Width Write Pulse Width High Programming Operation (Note 2) Sector Erase Operation (Note 2) VCC Setup Time (Note 1) Recovery Time from RY/BY# Program/Erase Valid to RY/BY# Delay Min Min Min Min Min Min Min Min Min Min Min Typ Typ Min Min Min 45 35 0 0 0 0 0 35 30 9 3 50 0 90 Speed Options 80R 80 Unit ns ns ns ns ns ns ns ns ns ns ns s sec s ns ns
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations
Parameter JEDEC tAVAV tAVEL tELAX tDVEH tEHDX Std tWC tAS tAH tDS tDH tOES tGHEL tWLEL tEHWH tELEH tEHEL tWHWsH1 tWHWH2 tGHEL tWS tWH tCP tCPH tWHWH1 tWHWH2 Description Write Cycle Time (Note 1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recovery Time Before Write (OE# High to WE# Low) WE# Setup Time WE# Hold Time CE# Pulse Width CE# Pulse Width High Programming Operation (Note 2) Sector Erase Operation (Note 2) Min Min Min Min Min Min Min Min Min Min Min Typ Typ 45 35 0 0 0 0 0 35 30 9 3 Speed Options 80R 80 Unit ns ns ns ns ns ns ns ns ns ns ns s sec
Notes: 1. Not 100% tested. 2. See the "Erase and Programming Performance" section for more information.
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DIE PHOTOGRAPH
DIE PAD LOCATIONS
14 13 12 11 10 9 8 7 6 5 4 3 2 1 51 50 49 48 47 46 45 44 43 42 41 40
AMD logo location
15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
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PAD DESCRIPTION
Pads relative to die center.
Pad
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Signal
WE# RESET# RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# VSS OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 VSS
Pad Center (mils) X Y
-3.11 -13.41 -23.34 -33.39 -43.44 -53.49 -63.54 -73.59 -83.64 -93.69 -102.32 -110.94 -119.57 -128.19 -128.19 -114.94 -106.36 -96.72 -88.15 -78.51 -69.94 -60.30 -51.74 -42.10 -34.48 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14
Pad Center (millimeters) X Y
-0.0790 -0.3406 -0.5929 -0.8482 -1.1034 -1.3587 -1.6140 -1.8692 -2.1245 -2.3798 -2.5988 -2.8179 -3.0370 -3.2560 -3.2560 -2.9194 -2.7015 -2.4566 -2.2391 -1.9941 -1.7766 -1.5317 -1.3141 -1.0692 -0.8758 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912
Pad
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
Signal
CLK BAA# IND# VCC VCC DQ4 DQ12 DQ5 DQ13 DQ6 DQ14 DQ7 DQ15 VSS NC A16 A15 A14 A13 A12 A11 A10 A9 A8 VCC LBA#
Pad Center (mils) X Y
-24.43 -14.38 25.76 42.04 50.19 57.06 66.70 75.27 84.91 93.47 103.12 111.68 121.32 128.19 128.19 119.57 110.94 102.32 93.69 83.64 73.59 63.54 53.49 43.20 23.10 14.94 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 -94.14 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18 98.18
Pad Center (millimeters) X Y
-0.6205 -0.3653 0.6543 1.0678 1.2749 1.4493 1.6942 1.9118 2.1567 2.3742 2.6192 2.8367 3.0816 3.2560 3.2560 3.0370 2.8179 2.5988 2.3798 2.1245 1.8692 1.6140 1.3587 1.0972 0.5866 0.3795 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 -2.3912 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938 2.4938
Note: The coordinates above are relative to the die center and can be used to operate wire bonding equipment.
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PAD DESCRIPTION
Pads relative to VCC.
Pad
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Signal
WE# RESET# RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# VSS OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 VSS
Pad Center (mils) X Y
-26.21 -36.51 -46.44 -56.49 -66.54 -76.59 -86.64 -96.69 -106.74 -116.79 -125.42 -134.04 -142.67 -151.29 -151.29 -138.04 -129.46 -119.82 -111.25 -101.61 -93.04 -83.40 -74.84 -65.20 -57.58 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32
Pad Center (millimeters) X Y
-0.6656 -0.9272 -1.1795 -1.4348 -1.6900 -1.9453 -2.2006 -2.4558 -2.7111 -2.9664 -3.1854 -3.4045 -3.6236 -3.8426 -3.8426 -3.5060 -3.2881 -3.0432 -2.8257 -2.5807 -2.3632 -2.1183 -1.9007 -1.6558 -1.4624 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850
Pad
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
Signal
CLK BAA# IND# VCC VCC DQ4 DQ12 DQ5 DQ13 DQ6 DQ14 DQ7 DQ15 VSS NC A16 A15 A14 A13 A12 A11 A10 A9 A8 VCC LBA#
Pad Center (mils) X Y
-47.53 -37.48 2.66 18.94 27.09 33.96 43.60 52.17 61.81 70.37 80.02 88.58 98.22 105.09 105.09 96.47 87.84 79.22 70.59 60.54 50.49 40.44 30.39 20.10 0.00 -8.16 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 -192.32 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00
Pad Center (millimeters) X Y
-1.2071 -0.9519 0.0677 0.4812 0.6883 0.8627 1.1076 1.3252 1.5701 1.7876 2.0326 2.2501 2.4950 2.6694 2.6694 2.4504 2.2313 2.0122 1.7932 1.5379 1.2826 1.0274 0.7721 0.5106 0.0000 -0.2071 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 -4.8850 s-4.8850 -4.8850 -4.8850 -4.8850 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000
Note: The coordinates above are relative to the VCC location and can be used to operate wire bonding equipment.
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ORDERING INFORMATION Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: Am29BL802C B 80R DP E 1
DIE REVISION This number refers to the specific AMD manufacturing process and product technology reflected in this document. It is entered in the revision field of AMD standard product nomenclature. TEMPERATURE RANGE I = Industrial (-40C to +85C) E = Extended (-55C to +125C) H = Super Extended (-55C to +145C) PACKAGE TYPE AND MINIMUM ORDER QUANTITY DP = Waffle Pack 125 die per 5 tray stack DG = Gel-Pak(R) Die Tray 336 die per 6 tray stack DT = SurftapeTM (Tape and Reel) 1600 per 7-inch reel DW = Gel-Pak(R) Wafer Tray (sawn wafer on frame) Call AMD sales office for minimum order quantity SPEED OPTION See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE B = Bottom boot sector DEVICE NUMBER/DESCRIPTION Am29BL802C Known Good Die 8 Megabit (512 K x 16-Bit) CMOS Flash Memory--Die Revision 1 3.0 Volt-only Program and Erase
Valid Combinations AM29BL802CB-80R (30 pF loading) DPI 1, DPE 1, DPH 1 DGI 1, DGE 1, DGH 1 DTI 1, DTE 1, DTH 1 DWI 1, DWE 1, DWH 1
Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.s
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PACKAGING INFORMATION Surftape Packaging
Direction of Feed
Orientation relative to leading edge of tape and reel
16 mm
AMD logo location
Gel-Pak and Waffle Pack Packaging
Orientation relative to top left corner of Gel-Pak and Waffle Pack cavity plate
AMD logo location
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PRODUCT TEST FLOW
Figure 1 provides an overview of AMD's Known Good Die test flow. For more detailed information, refer to the Am29BL802C product qualification database supplement for KGD. AMD implements quality assurance procedures throughout the product test flow. In addition, an off-line quality monitoring program (QMP) further guarantees AMD quality standards are met on Known Good Die products. These QA procedures also allow AMD to produce KGD products without requiring or implementing burn-in.
Wafer Sort 1
DC Parameters Functionality Programmability Erasability
Bake 24 hours at 250C
Data Retention
Wafer Sort 2
DC Parameters Functionality Programmability Erasability
Wafer Sort 3 High Temperature
DC Parameters Functionality Programmability Erasability Speed
Packaging for Shipment
Incoming Inspection Wafer Saw Die Separation 100% Visual Inspection Die Pack
Shipment
Figure 1. AMD KGD Product Test Flow
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PHYSICAL SPECIFICATIONS
Die dimensions . . . . . . . . . . . 269.7 mils x 214.2 mils . . . . . . . . . . . . . . . . . . . . . . . . . . 6.85 mm x 5.44 mm Die Thickness . . . . . . . . . . . . . . . . . . . . . . . . .500 m Bond Pad Size . . . . . . . . . . . . . . 3.74 mils x 3.74 mils . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 m x 95 m Pad Area Free of Passivation . . . . . . . . . .13.99 mils2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9,025 m2 Pads Per Die . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 Bond Pad Metalization . . . . . . . . . . . . . . . . . . . . Al/Cu Die Backside . . . . . . . . . . . . . . . . . . . . . . . . No metal, may be grounded (optional) Passivation. . . . . . . . . . . . . . . . . . Nitride/SOG/Nitride
MANUFACTURING INFORMATION
Manufacturing . . . . . . . . . . . . . . . . . . . . . . . . . . . FASL Wafer Sort Test . . . . . . . . . . . . Sunnyvale, CA, USA, . . . . . . . . . . . . . . . . . . . . . . . . and Penang, Malaysia Manufacturing ID (Bottom Boot) . . . . . . . . . . . . 98H11 Preparation for Shipment . . . . . . . . Penang, Malaysia Fabrication Process . . . . . . . . . . . . . . . . . . . CS39LS Die Revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SPECIAL HANDLING INSTRUCTIONS
Processing Do not expose KGD products to ultraviolet light or process them at temperatures greater than 250C. Failure to adhere to these handling instructions will result in irreparable damage to the devices. For best yield, AMD recommends assembly in a Class 10K clean room with 30% to 60% relative humidity. Storage Store at a maximum temperature of 30C in a nitrogenpurged cabinet or vacuum-sealed bag. Observe all standard ESD handling procedures.
DC OPERATING CONDITIONS
VCC (Supply Voltage) . . . . . . . . . . . . . . . 3.0 V to 3.6 V Operating Temperature Industrial . . . . . . . . . . . . . . . . . . . -40C to +85C Extended . . . . . . . . . . . . . . . . . . -55C to +125C Super Extended . . . . . . . . . . . . -55C to +145C
DC PARAMETER EXCEPTIONS
The following specifications replace those given in the Am29BL802 data sheet (publication number 22371):
Parameter ICC3 ICC4 Description VCC Standby Current (Note 3) Test Conditions CE#, RESET# = VCC0.3 V Typ 22 22 OE# = VIH OE# = VIL 30 30 Max 35 35 50 50 Unit A A A A
VCC Standby Current During Reset RESET# = VSS 0.3 V (Note 3) Automatic Sleep Mode (Notes 3, 4) VIH = VCC 0.3 V; VIL = VSS 0.3 V
ICC5
Notes: 3. Maximum ICC specifications are tested with VCC = VCCmax. 4. Automatic sleep mode enables the low power mode when addresses remain stable for tACC + 30 ns.
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AC CHARACTERISTICS Read Operations
Parameter JEDEC tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ Std. Description tRC Read Cycle Time (Note ) Test Setup Min CE# = VIL Max OE# = VIL OE# = VIL Max Max Max Max Min Min Min Speed Options and Temperature Ranges 80R 80 80 80 24 24 25 0 10 0 Unit ns ns ns ns ns ns ns ns ns
tACC Address to Output Delay tCE tOE tDF tDF Chip Enable to Output Delay Output Enable to Output Delay Chip Enable to Output High Z (Note ) Output Enable to Output High Z (Note ) Read Output Enable tOEH Hold Time (Note ) Toggle and Data# Polling
tAXQX
tOH
Output Hold Time From Addresses, CE# or OE#, Whichever Occurs First (Note )
Not 100% tested.
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TERMS AND CONDITIONS OF SALE FOR AMD NON-VOLATILE MEMORY DIE
All transactions relating to unpackaged die under this agreement shall be subject to AMD's standard terms and conditions of sale, or any revisions thereof, which revisions AMD reserves the right to make at any time and from time to time. In the event of conflict between the provisions of AMD's standard terms and conditions of sale and this agreement, the terms of this agreement shall be controlling. AMD warrants unpackaged die of its manufacture ("Known Good Die" or "Die") against defective materials or workmanship for a period of one (1) year from date of shipment. This warranty does not extend beyond the first purchaser of said Die. Buyer assumes full responsibility to ensure compliance with the appropriate handling, assembly and processing of Known Good Die (including but not limited to proper Die preparation, Die attach, wire bonding and related assembly and test activities), and compliance with all guidelines set forth in AMD's specifications for Known Good Die, and AMD assumes no responsibility for environmental effects on Known Good Die or for any activity of Buyer or a third party that damages the Die due to improper use, abuse, negligence, improper installation, accident, loss, damage in transit, or unauthorized repair or alteration by a person or entity other than AMD ("Warranty Exclusions"). The liability of AMD under this warranty is limited, at AMD's option, solely to repair the Die, to send replacement Die, or to make an appropriate credit adjustment or refund in an amount not to exceed the original purchase price actually paid for the Die returned to AMD, provided that: (a) AMD is promptly notified by Buyer in writing during the applicable warranty period of any defect or nonconformity in the Known Good Die; (b) Buyer obtains authorization from AMD to return the defective Die; (c) the defective Die is returned to AMD by Buyer in accordance with AMD's shipping instructions set forth below; and (d) Buyer shows to AMD's satisfaction that such alleged defect or nonconformity actually exists and was not caused by any of the above-referenced Warranty Exclusions. Buyer shall ship such defective Die to AMD via AMD's carrier, collect. Risk of loss will transfer to AMD when the defective Die is provided to AMD's carrier. If Buyer fails to adhere to these warranty returns guidelines, Buyer shall assume all risk of loss and shall pay for all freight to AMD's specified location. The aforementioned provisions do not extend the original warranty period of any Known Good Die that has either been repaired or replaced by AMD.
WITHOUT LIMITING THE FOREGOING, EXCEPT TO THE EXTENT THAT AMD EXPRESSLY WARRANTS TO BUYER IN A SEPARATE AGREEMENT SIGNED BY AMD, AMD MAKES NO WARRANTY WITH RESPECT TO THE DIE'S PROCESSING OF DATE DATA, AND SHALL HAVE NO LIABILITY F OR DAMAGES OF ANY KIND, UNDER EQUITY, LAW, OR ANY OTHER THEORY, DUE TO THE FAILURE OF SUCH KNOWN GOOD DIE TO PROCESS ANY PARTICULAR DATA CONTAINING DATES, INCLUDING DATES IN AND AFTER THE YEAR 2000, WHETHER OR NOT AMD RECEIVED NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THIS WARRANTY IS EXPRESSED IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED OR IMPLIED, INCLUDING THE IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE, THE IMPLIED WARRANTY OF MERCHANTABILITY AND OF ALL OTHER OBLIGATIONS OR LIABILITIES ON AMD's PART, AND IT NEITHER ASSUMES NOR AUTHORIZES ANY OTHER PERSON TO ASSUME FOR AMD ANY OTHER LIABILITIES. THE FOREGOING CONSTITUTES THE BUYER'S SOLE AND EXCLUSIVE REMEDY FOR THE FURNISHING OF DEFECTIVE OR NON CONFORMING KNOWN GOOD DIE AND AMD SHALL NOT IN ANY EVENT BE LIABLE FOR INCREASED MANUFACTURING COSTS, DOWNTIME COSTS, DAMAGES RELATING TO BUYER'S PROCUREMENT OF SUBSTITUTE DIE (i.e., "COST OF COVER"), LOSS OF PROFITS, REVENUES OR GOODWILL, LOSS OF USE OF OR DAMAGE TO ANY ASSOCIATED EQUIPMENT, OR ANY OTHER INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES BY REASON OF THE FACT THAT SUCH KNOWN GOOD DIE SHALL HAVE BEEN DETERMINED TO BE DEFECTIVE OR NON CONFORMING. Buyer agrees that it will make no warranty representations to its customers which exceed those given by AMD to Buyer unless and until Buyer shall agree to indemnify AMD in writing for any claims which exceed AMD's warranty. Known Good Die are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of the Die can reasonably be expected to result in a personal injury. Buyer's use of Known Good Die for use in life support applications is at Buyer's own risk and Buyer agrees to fully indemnify AMD for any damages resulting in such use or sale.
Am29BL802C Known Good Die
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SUPPLEMENT
REVISION SUMMARY Revision A (December 19, 2000)
Initial release.
Revision A+2 (September 13, 2002)
Changed title from Boot Sector to Burst Sector. AC Characteristics Added Read Options, Burst Mode Read, Erase/ Program Operations, and Alternate CE# Controlled Erase/Program Operations Tables.
Revision A+1 (June 27, 2001)
Manufacturing Information Added Penang, Malaysia as a test facility (ACN2016).
Trademarks Copyright (c) 2001 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
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Am29BL802C Known Good Die

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